1. Field of the Invention
The present invention relates to a Code Division Multiple Access (CDMA) system. More particularly, the present invention relates to a method and an apparatus for acquiring initial synchronization in a CDMA system.
2. Description of the Related Art
A Time Division Duplex (TDD) scheme is applied to a CDMA system, and the CDMA system based on the TDD scheme can use the same frequency band shared by both a downlink and an uplink and freely control and operate data capacities thereof by changing allocation of Time Slots (hereinafter, referred to as “TSs”) depending on a condition. Among such types of systems, a Time Division Synchronous Code Division Multiple Access (TD-SCDMA) system has been commercialized and is currently used in China.
FIG. 1 illustrates a structure of a sub-frame used in TD-SCDMA according to the related art.
Referring to FIG. 1, one sub-frames includes seven TSs having the same length for data transmission and a Special Time Slot (STS). The STS is used to distinguish between the downlink and the uplink, and includes a Downlink Pilot Time Slot (DwPTS), a Guard Period (GP), and an Uplink Pilot Time Slot (UpPTS). The DwPTS and the UpPTS include information for physical transmission synchronization. That is, a sequence for synchronization of forward link transmission is transmitted in a DwPTS field and a sequence for synchronization of reverse link transmission is transmitted in an UpPTS field. The TS in which data transmission is performed includes a data symbol interval and a mid-amble, and user data is included in the data symbol interval and includes pilot signal information for a mid-amble channel estimation. In general, TS0 is mainly used for data transmission for a broadcasting channel within a cell, TS1 is always used for uplink data transmission, and TS2 to TS6 are used for uplink or downlink data transmission according to higher allocation. Basically, TS1 and TS2 are allocated to the uplink, and TS3 to TS6 are allocated to the downlink. D and U within each TS block refer to the downlink and the uplink, respectively.
FIG. 2 illustrates a detailed structure of the DwPTS used for initial synchronization acquisition in the downlink according to the related art.
Referring to FIG. 2, the DwPTS includes GP and downlink synchronization (SYNC-DL) codes. The SYNC-DL code is transmitted with constant power and is not spread. Power of a SYNC-DL sequence is determined by higher layer signaling.
When the CDMA system based on the TDD scheme is initially driven, initial synchronization acquisition is necessary. The initial synchronization acquisition generally includes three steps described below and may be embodied in various types according to the implementation.
1. First Step: Search of the DwPTS and Identification of the SYNC-DL Sequence
A SYNC-DL sequence index is determined by performing slot synchronization by using the SYNC-DL sequence in the DwPTS in a second TS (STS) of one sub-frame. This is determined through comparison between a threshold and a maximum value from 32×6400 hypotheses acquired by performing a correlation through a matched filter. At this time, it may be required to acquire a plurality of hypotheses in consideration of several cells and the number of effective multi-path for each cell.
2. Second Step: Identification of Scrambling and Basic Mid-amble Codes
A corresponding mid-amble code group can be known from the SYNC-DL sequence acquired in the first step, i.e., Search of the DwPTS and identification of the SYNC-DL sequence, and a corresponding mid-amble code is identified among four basic mid-amble codes included in the group. The identified mid-amble code is equally used during one sub-frame. Further, since a relation between the mid-amble code and the scrambling code corresponds to a one-to-one correspondence mapping relation, when the mid-amble code is determined, the scrambling code is automatically determined. A correlation between the mid-amble code and the scrambling code is shown in Table 1 below.
TABLE 1Associated CodesCodeSYNC-DLSYNC-ULScramblingBasic Mid-ambleGroupIDIDCode IDCode IDGroup00 . . . 7001112233Group18 . . . 15442556677...Group31248 . . . 255124124321251251261261271273. Third Step: Control Multi-frame Synchronization
A phase of a channel value through a mid-amble of a Primary-Common Control Physical CHannel (P-CCPCH) is reflected to the SYNC-DL, and a position of a control multi-frame is determined by using information on a phase of the DwPTS.
4. Forth Step: Broadcasting CHannel (BCH) Decoding
Only when a CRC becomes “Good” through demodulation of the BCH are all the steps successfully completed and general communication starts. Such a step may not be included in an initial synchronization process.
Meanwhile, in the DCMA system based on the TDD scheme, channels related to initial synchronization having the structure shown in FIG. 1 are periodically received. Particularly, since the SYNC-DL including 64 chips is received every 5 ms interval in the TD-SCDMA system, the TD-SCDMA system has relatively low detection capabilities in comparison with Wide-band Code Division Multiple Access (W-DDCMA)/Frequency Division Duplex (FDD) systems in which initial synchronization is acquired using successively received pilot channels.
Accordingly, the TDD system acquires initial timing synchronization through the following two methods.
A first method finds an approximate position by using a power ratio between a SYNC-DL signal which exists in one sub-frame and a GAP adjacent to the SYNC-DL signal and then re-searches the vicinity of the position through a Maximum Likelihood (ML) scheme. Through the method, an approximate position is found by calculating a power ratio ((GP_left+GP_right)power/SYNC-DL power) between the SYNC-DL signal and GPs adjacent to a left side and a right side of the SYNC-DL in every sub-frame. At this time, the power ratio can be set and calculated as a chip interval or a multiple of the chip interval. However, since the method using the power ratio has low accuracy, a region having a minimum value should be found through the observation during significantly many sub-frames, and afterward energy is accumulated for every half chip by using the ML scheme for a predetermined interval in order to find accurate timing information in the unit of half chips in the decreased search interval. Thereafter, a position which is reported to have the highest energy is determined as a final timing position. Since the method requires only the calculation of the power ratio, a receiver structure is relatively simple. Further, since a first synchronization acquisition search interval is limited to the vicinity of the approximately found position, complexity can be reduced and a small size memory can be used. However, the method takes two or three times as long in comparison with a second method to find the accurate position, so that large degradation of the capability of this method should be expected.
The second method is a method of detecting a signal of one sub-frame by using the ML scheme, acquiring initial timing, and acquiring a code ID used as a corresponding pilot. For example, in TD-SCDMA, the method searches and compares energy amounts accumulated in all positions of entire sub-frame intervals (that is, 6400 chips) by using the ML scheme, and then calculates a SYNC-DL code having a largest energy value and a position determined in the unit of half chips. Although the method also calculates a final position through the observation for a plurality of sub-frame intervals, it takes less than half the time to acquire initial timing in comparison with the first method. However, since the method can determine the final position only when having energy values of all positions, memory size needs to be large. Accordingly, the method has a benefit in an aspect of the capability, but has a problem in an aspect of the complexity and memory size. Further, the second method can achieve the originally intended capability when there is only the downlink, but significant capability degradation is generated when an uplink signal transmitted from another terminal is located in the same frequency band.
In addition, in the first and second steps of the initial synchronization acquisition, when detection of the signal timing and acquisition of the SYNC-DL/Mid-amble ID is successfully declared, the subsequent step is performed. Mean Cell Search Time (MCST) may increase due to a false alarm which may be generated at this time. Particularly, when an error is generated due to the false alarm in the second step, a back side estimates a wrong residual frequency offset, and frame synchronization acquisition in the third step fails. Accordingly, the second step should be performed again, but this requires a lot of time. Therefore, it is required to minimize generation of the false alarm. However, it is difficult to acquire the desired capability just by simply controlling a threshold value. Further, when an initial synchronization acquiring process is performed in a place where a signal does not exist, the false alarm may be generated and thus an unnecessary cell searching process may be additionally performed. Accordingly, an additional reliability check algorithm is needed to reduce capability degradation due to the false alarm.
The above information is presented as background information only to assist with an understanding of the present disclosure. No determination has been made, and no assertion is made, as to whether any of the above might be applicable as prior art with regard to the present invention.